1. Field of the Invention
The present invention relates to a supporting substrate before cutting, a semiconductor device, and a method of forming the semiconductor device.
Priority is claimed on Japanese Patent Application No. 2009-093955, filed Apr. 8, 2009, the content of which is incorporated herein by reference.
2. Description of the Related Art
In order to realize high speed performances, high density packaging and multi-functions of a semiconductor device, and a chip on chip technology has been studied and developed. The chip on chip will be hereinafter, referred to as CoC. In this technology, a plurality of semiconductor chips is stacked over a substrate. The stack of the semiconductor chips is packaged in a single semiconductor package at high density. The CoC technology can also be referred to as a multi-chip package technology, hereinafter, referred to as MCP.
The semiconductor device using the CoC technology, hereinafter, referred to as a CoC semiconductor device, includes a plurality of wired-connected or direct-bonded semiconductor chips. The direct-bond will hereinafter be referred to as flip chip bonding.
The CoC semiconductor device having a plurality of stacked semiconductor chips has an increased thickness. Particularly, it is preferable that a small-sized semiconductor device is integrated in a mobile device such as a mobile phone. In recent years, the requirement for higher density integration or packaging has been on the increase. Increasing the number of stacked semiconductor chips in the semiconductor device increases the total thickness of the semiconductor device, thereby making it difficult to realize the higher density packaging.
If the thickness of individual semiconductor chip is reduced in order to reduce the total thickness of the CoC semiconductor device, this will increase a stress such as a thermal stress due to difference in thermal expansion between sealing resin and the semiconductor chip. The thermal stress is caused by a thermal treatment process. The thermal stress causes a bend of the semiconductor chip so that the side portion of the semiconductor chip slightly rises up and the sectioned shape of the semiconductor chip is concave. Such bend will be called to as “concave-bend”. In particular, the thermal stress is intensively applied to a position which is farthest from the substrate among the stacked semiconductor chips. This position will, hereinafter, be referred to as a top position. The largest concave-bend is generated in the top semiconductor chip which is positioned at the top position of the stack. The concave-bending will cause cracks in the semiconductor chips or the substrate.
Examples of countermeasure technique against these bending problems of the semiconductor chips are disclosed in Japanese Unexamined Patent Application, First Publications, Nos. JP-A-2006-269861, and JP-A-2007-066932.
Japanese Unexamined Patent Application, First Publications, Nos. JP-A-2006-269861 and JP-A-2007-066932 each relate to a semiconductor device and a method of forming the same. Each publication discloses a CoC semiconductor device which includes a lower substrate or a wiring board, in which a predetermined wiring is formed. The CoC semiconductor device further includes semiconductor chips which are electrically connected to the lower substrate. The CoC semiconductor device further includes an intermediate member, or a sealing member, which seals the semiconductor chips. The CoC semiconductor device further includes an upper plate which is disposed over the semiconductor chips. The thermal expansion rates of the upper plate and the lower substrate are approximately the same. By using the upper plate and the lower substrate having approximately the same thermal expansion rate, the bending of the semiconductor chip can be reduced.
The semiconductor devices disclosed in Japanese Unexamined Patent Application, First Publications, Nos. JP-A-2006-269861 and JP-A-2007-066932 are engaged with the following problems. Since the upper plate is arranged in an upper position which is distant from the stacked semiconductor chips, the thickness of the semiconductor device is increased. Since the upper plate is bonded only to the intermediate member, the intermediate member can easily be removed due to mechanical stress or mechanical shock. In addition, since the stacked semiconductor chips are sealed only by molding, voids will be generated between the semiconductor chips, to thereby lower the reliability of the semiconductor device.
Japanese Unexamined Patent Application, First Publication, No. JP-A-2006-319243 relates to a memory module and a manufacturing method thereof. This publication discloses a structure example which reinforces the CoC semiconductor device. The memory module disclosed in Japanese Unexamined Patent Application, First Publication, No. JP-A-2006-319243 is a memory module which includes a memory core chip, an interface chip and an interposer chip, and a radiator plate is provided in the vicinity of the interface chip. Further, the radiator plate is used as a support body.
Since the support body (radiator plate) is attached to the semiconductor chips only through an adhesive layer, it is likely to be detached due to mechanical damage or the like. For manufacturing the memory module, when underfill material is filled in gaps between the stacked chips, the underfill material is expanded. Accordingly, a shape, hereinafter, referred to as a fillet shape, of a portion in which the underfill material comes out of the gaps between the stacked chips is unstable. Thus, voids are generated between the stacked chips to generate cracks or the like in a reflow process, to thereby lower the reliability of the semiconductor device. In addition, in order to form an individual sealing member when manufacturing the memory module, it is necessary to prepare a mold tool for each of a plurality of chip mounting sections. Moreover, when manufacturing the memory module, in the case where the plurality of chip mounting sections is covered with the sealing member, sealing resin in a batch, thermal stress is applied to the support body, to thereby cause bend in the support body.